FPGA Accelerator for Protein Structure Prediction Algorithms

Bioinformatics applications are computationally very expensive programs. They work with large data sets and also consume a lot of CPU cycles and often require high degrees of precision. An important application in this area is tertiary structure prediction of proteins. This paper reports a codesign methodology to build hardware accelerators to minimize the running time of a protein energy minimization algorithm. It has been shown that significant speedups can be obtained by moving core time consuming functions onto an FPGA. It has been shown that a 5 fold decrease in the run time of the application can be achieved by simply moving one core function into hardware. Upto an order of magnitude improvement in runtimes can be obtained by moving two functions (core functions in many other bioinformatics applications) which consume 99% of the CPU cycles in the chosen application. A generalized speedup analysis using single and multiple FPGA cards has also been presented.